1. Field of the Invention
The present invention relates to a technology for generating and recording trace information of the program execution status of a processor. More specifically, it relates to a tracer, which effectively compresses and records trace information.
2. Description of the Related Art
Recent microprocessors have been required not only to provide a higher operating performance at a higher operating frequency, but also to support a decrease in the development time of a processor embedded system. In development of a processor or a processor embedded system, analysis of information (trace information) of the flow of a program executed by the processor and data update information is effective to decrease development time. Therefore, technologies including a processor capable of externally outputting trace information and an in-circuit emulator (ICE) or the like, which analyzes the execution of a program flow and updates data, based on the extracted trace information, have been developed and provided.
Development of higher-speed processors makes it difficult to capture a signal for trace analysis. Therefore, development of technologies for reducing the number of signals to be output in real time by compressing processor trace information, and development of technologies for storing trace information in a memory in real time, by providing memory in the processor, are being pursued. A method using a variable length trace storage format, which allows storage of as much trace information as possible in the internal memory of the processor, is well-known (See, “EJTAG TRACE CONTROL BLOCK SPECIFICATION”, MIPS Technologies Inc. Document Number: MD00148, Revision 1.04, Mar. 21, 2002, P. 3-6, for example).
However, there is a disadvantage when storing trace information of this variable length trace storage format in a memory (trace memory). That is pieces of variable length data cannot be stored in that memory without leaving vacant areas in the memory. Consequently, useless data is inserted therebetween.
In other words, when using the variable length trace storage format, in order to analyze stored trace information, 4-bit information needed for finding the start address of trace information, which is stored in each word (64 bit) area of the trace memory, is typically stored in the lower bits [3:0]. Thus, 1/16 of the trace memory capacity cannot be used for storing trace information. Furthermore, the start addresses of respective pieces of trace information, each indicated by that 4-bit information, are at 4-bit intervals. Thus, when the end address of the immediately preceding trace information is not multiples of 4 minus 1, useless data is inserted, preventing storage of most of trace information in the memory.